Seoul National Univ. DMSE
Notice

Seminar & Colloquium

Seminar & Colloquium
[세미나: 5월 3일(금), 오전 11시] Dr. Stefano Ambrogio, IBM-Research

[세미나: 5월 3일(금), 오전 11시] Dr. Stefano Ambrogio, IBM-Research

 

Title

Accelerating AI with Analog In-Memory-Computing

 

Speaker

Dr. Stefano Ambrogio, Senior Research Scientist, IBM-Research, Almaden

 

* Biography

Stefano Ambrogio obtained his PhD in 2016 at Politecnico di Milano, Italy, studying the reliability of resistive memories and their application on neuromorphic networks. He is now a Senior Research Scientist at IBM-Research, Almaden, in the Analog AI team, working on hardware accelerators based on Non-Volatile Memories for neural network inference.

 

| Date | Friday May 3rd , 2024

| Time | 11:00 ~

| Venue |  https://snu-ac-kr.zoom.us/j/6808574038

 

[Abstract]

  The last decade has witnessed the pervasive spread of AI in a variety of domains, from image and video recognition and classification to speech and text transcription and generation. In general, we have observed a relentless run towards larger models with huge number of parameters. This has led to a dramatic increase in the computational workload, with the necessity of several CPUs and GPUs to train and inference neural networks. Therefore, improvements in the hardware have become more and more essential.

 

 To accommodate for improved performance, in-memory computing provides a very interesting solution. While digital computing cores are limited by the data bandwidth between memory and processor, computation in the memory avoids the weight transfer, increasing power efficiency and speed. We show our own 14-nm chip, based on 34 crossbar arrays of Phase-Change Memory technology, with a total of around 35 million devices, and we demonstrate the efficiency of such architecture in a selection of MLPerf networks, demonstrating that Analog-AI can provide superior power performance with respect to digital cores, with comparable accuracy.

 

 Then, we provide guidelines towards the next steps in the development of reliable and efficient Analog-AI chips, with specific focus on the architectural constraints and opportunities that are required to implement larger and improved Deep Neural Networks.

 

| Host | 김상범 교수(02-880-7359)